vector-add.xtl

1⍝!/usr/bin/env xetal
2⍝ research7's first FPGA experiment: c := a + b on eight 16-bit
3⍝ numbers, eight adders. The last pair overflows 16 bits, and the
4⍝ circuit's answer is the wrapped one. Run with "just demo-lib Datapath vector-add".
5ᵈᵖ⁼u̲se< "Datapath"
6a ← 1 2 3 4 100 -100 32767 30000
7b ← 10 20 30 40 -100 100 1 30000
8a + b                         ⍝ the evaluator's 64-bit sum
9ᵘv̲add ← ᵈᵖv̲add 16
10a ᵘv̲add b                     ⍝ the eight 16-bit adders' sum